Position Overview:

As a Sr. Staff signal integrity engineer, you will be working on challenging SI and PI tasks in globally distributed teams. You will be supporting SI/PI signoff of chip design, package design and PCB design in order to support successful delivery of products of various product lines to market. You will be working with design, test, P&R and application teams globally for modeling of chip high speed I/O and power rails. You will be supporting customers in signing off hardware design or resolving SI/PI issues where system design has constraints. You will also be involved in defining specifications of product electrical performance. You may also be involved in modeling and simulation of EMC issues.

Responsibilities:

Primary (70%):

1. Responsible for SI/PI sign-off of chip design, package design and PCB design.

2. Responsible for modeling high speed I/O and PDN.

3. Responsible for customer support for PCB design sign-off and issue debug.

Secondary (30%):  

1. Responsible for product electrical specifications related to high speed I/O.

2. Responsible for modeling and simulation of EMC issues.

Requirements:

Experience/Skills:

1. 10+ year working experience in SI/PI

2. Deep understanding in electromagnetic theory, transmission line theory and microwave theory

3. Familiar with SI/PI design flow, time domain and frequency domain modeling and simulation

4. Good comprehension of PLL, equalization, CDR, jitter, noise, IBIS modeling, 8b10b encoding

5. Hands on with lab equipment including high speed oscilloscope, spectrum analyzer and network analyzer

6. Skilled with SI/PI simulation tools from ANSYS, Cadence, Keysight and others.

7. Skilled in data processing with script in Python, Matlab or other language.

8. Experience in MIPI D-PHY, C-PHY and PAM-4 is a plus. 

9. Good communication skills and team work.

Education:  

MS/PhD